Procedures

called with general
Echo {<list of data>}
write the list of data into the output buffer.
MakeData <offset>
advances the output pointer by <offset> positions.
IdentIS
writes module list to the ouput buffer.
Timestamp {} | 0 | 1
writes timestamp to the ouput buffer in following formats:
OS9 ({} | 0) = {days seconds 1/100s} since 01-01-1970 01:00:00
UNIX (1) = {seconds microseconds) since 01-01-1970 01:00:00
DumpCommands 0 | {1 XDR_string}
???.
general/struct
IfThenElse {<variable name> {<procedure list 1>} {<procedure list 2>}}
if the value of <variable name> is != 0 execute {<procedure list 1>} else {<procedure list 2>}.
Loop {<number> {<procedure list>}}
executes {<procedure list>} <number> times.
VarLoop" {<variable name> {<procedure list>}}
executes {<procedure list>} <values of <variable name>> times.
While
internal use ???
ResultInVar
internal use ???
LenVor
internal use ???
general/vars
SetIntVar {<variable name> <integer value>}
sets <variable name> to <integer value>.
GetIntVar <variable name>
writes the content of the integer variable <variable name> to the output buffer.
GetVar <variable name>
writes the content of the integer array <variable name> to the output buffer.
GetVarRange <variable name> <first index> <last index>
writes the content of the integer array <variable name> to the output buffer starting at <first index> and stopping at <last index>.
IncIntVar <variable name>
increments the value of <variable name> by "1".
IncHistoVar <variable name> <index> <index> <index>
internal use ???.
general/raw
ReadRaw <address>
reads one long word from the physical address <address> and writes it to the output buffer.
WriteRaw {<address> <value>}
writes the long word <value> to the physical address <address>.
ReadByteRaw <address>
reads one byte from the physical address <address> and writes it to the output buffer.
WriteByteRaw {<address> <value>}
writes the byte <value> to the physical address <address>.
WriteIntVarByteRaw {<address> <variable name>}
writes the byte value of the variable <variable name> to the physical address <address>.
test
GetDebugMask
writes the bit mask, specifying the debug level, to the output buffer.
SetDebugMask <bit mask>
sets the bit mask, specifying the debug level.
GetVerboseFlag
writes the verbose flag to the output buffer.
SetVerboseFlag 0 | 1
sets the verbose flag.
Error {<error code> {<description text>}}
write the error description text to the output buffer, returns the error code.
T_Error <error code>
prints the error code as debug message.
Exit 1879
exits the program, if "1879" is given as the only argument.
Halt
halts the program.
SendUnsol {<message type> {<message text>}}
sends <message text> as unsolicited message of type <message type>.
SendUnsolLoop {<number> {<message text>}}
sends <message text> <number> times as unsolicited message of type "Unsol_Test".
SendLoopTime <number>
sends the current time in 1/100 seconds <number> times starting from "0" (=time of procedure call) as unsolicited message of type "Unsol_Test".
SendLoopCount <number>
sends <number> unsolicited messages of type "Unsol_Test" containing an integer value successively incremented from "0" to "<number>-1".
SULC <number> <delay>
don't use, seems to lead to a core dump.
Delay <delay>
returns after <delay> seconds.
WriteVarSize <variable name>
writes "71" to the output buffer <value of <variable name>> times.
WriteVarRSize <variable name>
writes a value generates by "eventcnt<<16|((current_IS<<12)&0xf000)|(i&0xfff)" to the output buffer not more than <value of <variable name>> times, the actual number is chosen randomly, the sequence of number is prepended by <current_IS> and the number of following values.
WriteRandSize <variable name>
writes the number of following values (+1) to the output buffer not more than <value of <variable name>> times, the actual number is chosen randomly.
PrintEvent
prints the actual event number.
OnReadoutError <error code>
simulates a readout error with <error code>.
SendVarUnsol {{<variable name> [<variable name> ...]} <type>}
send the contents of the variables listed as unsolicited message of type "Unsol_Data" prepended by the <type> and the number of following values.
WriteRandom <number>
writes a random number to the output buffer <number> times.
WriteVarSizeRandom <variable name>
writes a random number to the output buffer <value of <variable name>> times.
StdOut <filename>
redirect stdout to <filename>.
ReadoutPrior [<number>]
writes the content of the interval variable "readout_prior" to the output buffer and set it to <number> if <number> is given.
MaxevCount [<number>]
writes the content of the interval variable "maxevcount" to the output buffer and set it to <number> if <number> is given.
Stream <name of array>
writes the incremented values of <name of array>[1] to the output buffer not more than <value of <name of array>[0]> times, prepended by the number of following values.
SelectStat
???.
internals/cluster
ClusterEvMax [<number>]
writes the content of the interval variable "maxev_procluster" to the output buffer and set it to <number> if <number> is given.
internals/sched
PrintTasks
???.
AdjustPrio
???.
tape
TapeErase {<dataout index> <return immediately?>}
overwrites the tape attached to <dataout index>, returns immediately (<return immediately?>!=0) or when the action is finished.
TapeInquiry <dataout index>
inquires tape and returns names.
TapeLoad {<dataout index> <return immediately?>}
loads tape attached to <dataout index>, returns immediately (<return immediately?>!=0) or when the action is finished.
TapeUnload {<dataout index> <return immediately?>}
unloads tape attached to <dataout index>, returns immediately (<return immediately?>!=0) or when the action is finished.
TapeLocate {<dataout index> <return immediately?>}
returns position of the tape attached to <dataout index>, returns immediately (<return immediately?>!=0) or when the action is finished.
TapeClearLog <dataout index>
clears the log information of the tape attached to <dataout index>.
TapeModeSelect {<dataout index> <density?>}
sets the density of the tape attached to <dataout index>.
TapeModeSense <dataout index>
reports the density of the tape attached to <dataout index>.
TapePreventRemoval <dataout index>
locks the tape drive attached to <dataout index> so the tape can't be removed.
TapeAllowRemoval <dataout index>
unlocks the tape drive attached to <dataout index> so the tape can be removed.
TapeReadPos <dataout index>
reads the position of the tape attached to <dataout index>.
TapeRewind {<dataout index> <return immediately?>}
rewinds the tape attached to <dataout index> returns immediately (<return immediately?>!=0) or when the action is finished.
TapeSpace {<dataout index> <what> <how many>}
advances the tape attached to <dataout index> by <how many> blocks (<what>=0), filemarks (<what>=1), eod marks (<what>=2), or setmarks (<what>=3).
TapeWrite {<dataout index> <how many> <data>}
writes data to tape attached to <dataout index>.
TapeFilemark {<dataout index> <return immediately?> <force it?>}
writes a filemark to the tape attached to <dataout index>, returns immediately (<return immediately?>!=0) or when the action is finished, can be forced (<force it?>!=0) to write the filemark even if it doesn't seem reasonable.
TapeDebug {<dataout index> <debug level>}
sets the debugging level of the tape attached to <dataout index>.
caenet
caenet_write {<bus> <16-bit data word> <16-bit data word> ...}
write 16-bit words to bus
caenet_writeB {<bus> <byte> <byte> ...}
write bytes to bus
caenet_read {<bus> [<max_words>]}
read 16-bit words from bus, either a whole CAENET block (see CAENET_BLOCKSIZE in caennet.h) or <max_words> words
caenet_readB {<bus> [<max_bytes>]}
read bytes from bus, either a whole CAENET block (see CAENET_BLOCKSIZE in caennet.h) or <max_bytes> bytes
caenet_write_read {<bus> <16-bit data word> <16-bit data word> ...}
write 16-bit words to bus and read up to CAENET_BLOCKSIZE/2 16-bit words back
caenet_write_readB {<bus> <byte> <byte> ...}
write bytes to bus and read up to CAENET_BLOCKSIZE bytes back
caenet_echo <bus>
???
caenet_timeout {<bus> <timeout>}
set bus timeout in units of ???
caenet_led <bus>
???
caenet_reset <bus>
reset bus
camac
NOTE: <N> is the real slot number. is the position of the module in the VEDs modullist, which may correspond to the real slot number if the modullist is setup appropriately.
When used with an IS_procedure <n> is the position of the module in the ISs memberlist (= virtual slot number (VSN)) which is converted to N internally.
When used with a VED_procedure <n>=<N>.
Commands which do not address a specific slot now need the <crate id> as argument.
CCCC <crate id>
executes a "CCCC" command on the CAMAC bus.
CCCI {<crate id> 0|1}
executes a "CCCI" command on the CAMAC bus.
CCCZ <crate id>
executes a "CCCZ" command on the CAMAC bus.
CFSA {<N> <A> <F>}
performs a CAMAC command.
CFUBC {<N> <A> <F> <how many>}
performs a CAMAC block command.
CSUBC {<N> <A> <F> <how many>}
performs a CAMAC block command with 16 bit data transfer.
nAFread {<n> <A> <F>}
reads one data words from CAMAC and appends it to the output buffer.
nAFread_untilQ {<n> <A> <F> <how many>}
reads data words from CAMAC and appends them to the output buffer as long as Q is not set and the number of data words read hasn't reached <how many>.
nAFwrite {<n> <A> <F> <data word>}
performs a CAMAC write with <data word>.
nAFwrite_untilQ {<n> <A> <F> <data word> <how many>}
performs a CAMAC write with <data word> as long as Q is not set and the number of data words written hasn't reached <how many>.
nAFwrite_q {<n> <A> <F> <data word>}
performs a CAMAC write with <data word> and writes the status of the Q (=0x80000000) and X (=0x40000000) lines to the output buffer.
nAFcntl {<n> <A> <F>}
performs a CAMAC control command.
nAFcntl_untilQ {<n> <A> <F> <how many>}
performs a CAMAC control command as long as Q is not set and the command hasn't been executed <how many> times.
nAFcntl_q {<n> <A> <F>}
performs a CAMAC control command and and writes the status of the Q (=0x80000000) and X (=0x40000000) lines to the output buffer.
QX <crate id>
writes the status of the Q (=0x80000000) and X (=0x40000000) lines to the output buffer.
nAFblread {<n> <A> <F> <how many>}
reads <how many> data words from CAMAC and appends them to the output buffer.
nAFreadQstop {<n> <A> <F> <how many>}
reads data words from CAMAC and appends them to the output buffer as long as Q is set and the number of data words read hasn't reached <how many>.
nAFreadQstop1 {<n> <A> <F> <how many>}
reads data words from CAMAC and appends them to the output buffer as long as Q is set and <how many> isn't reached, data are preceded by the number of data words.
nAFreadAddrScan {<n> <A> <F> <how many>}
reads data words from CAMAC, appends them to the output buffer, and increments the address as long as Q is set and the number of data words read hasn't reached <how many>.
nAFreadIntVar {<variable name> <n> <A> <F>}
reads one data words from CAMAC and writes it to the variable <variable name>.
nAFwriteIntVar {<n> <A> <F> <variable name>}
takes the content of the variable <variable name> and performs a CAMAC write.
nAFblreadVar {<array name> <n> <A> <F> <how many>}
reads <how many> data words from CAMAC and writes them to the array <array name>, the status of the Q (=0x80000000) and X (=0x40000000) lines is stripped.
nAFblwriteVar {<array name> <n> <A> <F> <how many>}
writes <how many> data words from the array <array name> to CAMAC.
nAFblreadAddVar {<array name> <n> <A> <F> <how many>}
reads <how many> data words from CAMAC and adds them to the corresponding elements of the array <array name>, the status of the Q (=0x80000000) and X (=0x40000000) lines is stripped.
camac/c219
c219statist {<n> <var1> <var2> <var3>}
reads the input register and increments some arrays
camac/c894
C894init <n>
set default values (all thresholds to maximum, disable all channels, output width to maximum, majority threshold to maximum)
C894threshold {<n> <channel> <threshold>}
set threshold of <channel> (or of all channels if <channel>=-1) to <threshold>
C894enable {<n> <bitmask>}
enable channels with their bit set to '1' in <bitmask>
C894pulsewidth {<n> <channel selector> <width>}
set output width channels to <width> (<channel selector>=1 -> channels=1-7, 2 -> 8-15, 3 -> all)
C894majthr {<n> <threshold>}
set majority threshold to <threshold>
C894majlev {<n> <number of channels>}
set majority level to <number of channels>
C894testpulse {<n>}
generate test pulse on all channels
camac/caennet
CAENnetRead {<n> <crate> <channel> <parameter>}
read data from CAENnet through a C139 camac module
CAENnetWrite {<n> <crate> <channel> <parameter> <value>}
write data to CAENnet through a C139 camac module
camac/fera
FERAsetup {<timeout> <delay> <single event mode?> {<list of data>}}
initializes a FERA readout system consisting of an FSC (whatever this is), two dual port memories FERA_MEM_4302, a driver module FERA_DRV_4301, and a number of readout modules (FERA_ADC_4300B, FERA_TDC_4300B, SILENA_ADC_4418V, BIT_PATTERN_UNIT, CNRS_QDC_1612F, CNRS_TDC_812F, or RAL11X_RDOUT). the modules must appear in the memberlist in exactly this order. first the FSC is resetted and <timeout> and <delay> are written to the FSC, then the data (e.g. pedestals) are written to the readout modules, after this the dual port memories are resetted and their ECL ports are enabled, then the readout mode (<single event mode?>) of the FSC is set and its LAM is enabled.
FERAreadoutM <n>
copies a block of data from a FERA memory at virtual slot number <n> to the output buffer.
FERAreadout
copies a block of data from the FERA memory which has answered (by polling the FSC (=single event mode)) to the output buffer.
FERAreadoutC
if one of the FERA memory containes an event the data are copied to the output buffer (= 'FERAreadout'), otherwise the contents of both memories are copied to the output buffer (= 'FERAreadoutM 2' followed by 'FERAreadoutM 3').
FERAmesspeds {<timeout> <delay>}
measures the offsets of FERA_ADC_4300B, FERA_TDC_4300B, and SILENA_ADC_4418V modules and writes the computed pedestals to the output buffer.
StandardFERAsetup {<list of data>}
initializes a standard FERA readout system consisting of a dual port memories FERA_MEM_4302, a driver module FERA_DRV_4301, and a number of readout modules. the modules must appear in the memberlist in exactly this order. the data (e.g. pedestals) are written to the readout modules, after this the dual port memory are resetted and its ECL ports is enabled.
StandardFERAmesspeds
measures the offsets of FERA_ADC_4300B, FERA_TDC_4300B, and SILENA_ADC_4418V modules and writes the computed pedestals to the output buffer.
camac/fera/pcicamac
FERAsetupZEL {<timeout> <delay> <single event mode?> <data for each module in the memberlist>}
initializes a FERA readout system consisting of a PCI-CAMAC controller and a number of readout modules. after disabling the controller the data (e.g. pedestals) are written to the readout modules. <timeout>, <delay>, and <single event mode?> are written to the controller, then the controller is enabled.
FERAreadoutZEL
reads a block of data and writes it to the output buffer.
FERAgateZEL
???.
FERAstatusZEL
writes the status of the FERA system to the output buffer.
camac/ral
RALconfig <n>
configures the RAL system with the controller located at virtual slot number <n> and counts the RAL chips, the results of the performed actions are written to the output buffer.
RALdatapathtest <n>
tests the RAL system with the controller located at virtual slot number <n>, in case of an error the result is written to the output buffer.
RALloadtestregs {<n> <column> <which data> {<list of data>}}
loads the test registers of the RAL chips in column <column> attached to the controller at virtual slot number <n> with
'0' except the channels given in {<list of data>} (<which data>==0),
'1' except the channels given in {<list of data>} (<which data>==1), or
data given as XDR string (<which data>==2).
RALloaddac {<n> <column> <which data> {<list of data>}}
loads the DAC registers of the RAL chips in column <column> attached to the controller at virtual slot number <n> with the data in {<list of data>}, data can be given as XDR data (<which data>=1) or as numbers (<which data>=0).
RALfilterramload {<n> <column> <which data> {<list of data>}}
loads the filter registers of the controller at virtual slot number <n> with the data in {<list of data>}, which consists the information about channels to suppress in form of bit-patterns, data can be given as XDR data (<which data>=2), as already inverted (<which data>=0) or non-inverted (<which data>=1) numbers.
RALfilterramread <n>
reads the content of the filter registers of the controller at virtual slot number <n> and writes it to the output buffer.
RALfilterramtest <n>
sets all filter registers of the controller at virtual slot number <n> to 0xa5 and reads the values back for checking, errors are written to the output buffer.
RALtestreadout {<n> <test with what> <mode> <array name>}
tests readout from the controller at virtual slot number <n> and writes the data to the array <array name>, <test with what> can be
'3'=RAL_CTL_TST_ZERO: data are all '0'
'1'=RAL_CTL_TST_ONE: data are all '1'
'2'=RAL_CTL_LD_TST: data are taken from the test registers
RALreadout <n>
waits for the conversion to finish and copies the data from the controller at virtual slot number <n> to the output buffer.
camac/scaler
Scaler4434_ini {<array name> <pattern>}
initializes the scalers chosen by <pattern> and sets the lower and upper values (corresponding the the channels) in the array <array name> to 0.
Scaler2551_ini {<array name> <pattern>}
initializes the scalers chosen by <pattern> and sets the lower and upper values (corresponding the the channels) in the array <array name> to 0.
Scaler4434_clear {<array name> <pattern>}
clears the scalers chosen by <pattern> and sets the lower and upper values (corresponding the the channels) in the array <array name> to 0.
Scaler2551_clear {<array name> <pattern>}
clears the scalers chosen by <pattern> and sets the lower and upper values (corresponding the the channels) in the array <array name> to 0.
Scaler4434_start {<array name> <pattern>}
starts the scalers chosen by <pattern>.
Scaler2551_start {<array name> <pattern>}
starts the scalers chosen by <pattern>.
Scaler4434_stop {<array name> <pattern>}
stops the scalers chosen by <pattern>, adds the current values to the array <array name>, and clears the scaler channels.
Scaler2551_stop {<array name> <pattern>}
stops the scalers chosen by <pattern>, adds the current values to the array <array name>, and clears the scaler channels.
Scaler4434_update {<array name> <pattern>}
adds the current values of the scalers chosen by <pattern> to the array <array name> and clears the scaler channels.
Scaler2551_update {<array name> <pattern>}
adds the current values of the scalers chosen by <pattern> to the array <array name> and clears the scaler channels.
Scaler4434_lam {<array name> <pattern>}
clears LAM of the scalers chosen by <pattern> and adds the current values to the array <array name>.
Scaler2551_lam {<array name> <pattern>}
clears LAM of the scalers chosen by <pattern> and adds the current values to the array <array name>.
Scaler4434_read {<array name> <n> <mask>}
searches for a 'cluster' ???, adds the current values of the scaler at virtual slot number <n> to the array <array name>, clears the scaler channels, and writes the scaler values chosen by <mask> to the output buffer.
Scaler4434_update_read {<array name> <n> <mask>}
adds the current values of the scaler at virtual slot number <n> to the array <array name>, clears the scaler channels, and writes the scaler values chosen by <mask> to the output buffer.
Scaler4434_update_read_n {<array name> <n> <number of channels>}
adds the current values of the scaler at virtual slot number <n> to the array <array name>, clears the scaler channels, and writes <number of channels> followed by <number of channels> scaler values starting with channel '0' to the output buffer.
Scaler2551_update_read {<array name> <n> <mask>}
adds the current values of the scaler at virtual slot number <n> to the array <array name>, clears the scaler channels, and writes the scaler values chosen by <mask> to the output buffer.
camac/tdc
TDC2277setup {<list of data>}
write the data (one date per module) to the control register 0 of all LC2277 TDC modules.
TDC2277readout
reads the data from all LC2277 TDC modules and writes them to the output buffer.
TDC2277gate <maximum value>
reads the data from all LC2277 TDC modules and writes them to the output buffer if their values are below <maximum value>.
TDC2228readout
reads the data from all LC2228 TDC modules and writes them to the output buffer.
Scaler2551readout
reads the data from the registers of all LC2551 scaler modules and writes them to the output buffer.
camac/trigger
ResetTrigger <n>
resets the GSI trigger module at virtual slot number <n>.
fastbus
FRD_F <?>
FClear
clears FastBus system.
FPulse <?>
FGetChi <?>
OutLevel <?>
OutClock <?>
ExtStatus <?>
FRDL <primary address> <secondary address> <number of loops>
returns a so-called SS-code and some value.
FRDBL <primary address> <secondary address> <number of data> <number of loops>
returns a so-called SS-code and the number of data.
fastbus/general
FRD <?>
FWD <?>
FRC <?>
FWC <?>
FRCB <?>
FRDB <?>
FRDB_S <?>
FRDBv <?>
FWCB <?>
FWDB <?>
FBArbLevel <?>
FModulID <?>
FModulList <?>
FRCM <?>
FRDM <?>
FWCM <?>
FWDM <?>
fastbus/general
FBMB_BuildPed <?>
FBMB_LoadSetup <?>
FBMB_ReadSetup <?>
FBMB_Readout <?>
FPSTRO <?> (Rossendorf)
FPSTINI <?> (Rossendorf)
FPSMBRO <?> (Rossendorf)
fastbus/fb_lecroy
fb_lc1810_setup <fast clear window> <frequency reference> <test mode?>
sets a fast clear window of (1024*<fast clear window>+100)ns with <fast clear window>=0..63 which may be accepted by TDCs 1875A, 1876, 1877, and ADC 1881 if the modules are configured for this. The CAT 1810 produces a frequency which can serve as an external frequency reference for TDC 1879 modules, the value is 10^5 MHz / (1.6*(256-<frequency reference>)) with <frequency reference>=6..131. <test mode?>=1 enables the CAT 1810 to produce signals for testing ADC and TDC modules.
fb_lc1810_check_start <?>
fb_lc1810_check <?>
fb_lc1810_check_reset <?>
fb_lc1810_reset <?>
fb_lc1872a_setup <?>
fb_lc1872a_readout_pl <?>
fb_lc1872a_readout <?>
fb_lc1875_setup <?>
fb_lc1875_readout_pl <?>
fb_lc1875_readout <?>
fb_lc1875a_setup <?>
fb_lc1875a_readout_t2 <?>
fb_lc1875a_readout_t1 <?>
fb_lc1875a_readout_pl <?>
fb_lc1875a_readout <?>
fb_lc1875p_setup <?>
fb_lc1875p_readout <?>
fb_lc1876_setup <?>
fb_lc1876_check_buf <?>
fb_lc1876_read_ptr <?>
fb_lc1876_readout_pl <?>
fb_lc1876_readout_check <?>
fb_lc1876_readout <?>
fb_lc1877_setup <?>
fb_lc1877_check_buf <?>
fb_lc1877_read_ptr <?>
fb_lc1877_readout_t2 <?>
fb_lc1877_readout_t1 <?>
fb_lc1877_readout_pl <?>
fb_lc1877_readout_check <?>
fb_lc1877_readout <?>
fb_lc1879_setup <?>
fb_lc1879_readout_t2 <?>
fb_lc1879_readout_t1 <?>
fb_lc1879_readout_pl <?>
fb_lc1879_readout <?>
fb_lc1881_setup <?>
fb_lc1881_measure_ped <?>
fb_lc1881_build_ped <?>
fb_lc1881_read_ped <?>
fb_lc1881_check_buf <?>
fb_lc1881_read_ptr <?>
fb_lc1881_readout_t2 <?>
fb_lc1881_readout_t1 <?>
fb_lc1881_readout_pl <?>
fb_lc1881_readout_check <?>
fb_lc1881_readout <?>
fb_lc1885f_setup <?>
fb_lc1885f_measure_ped <?>
fb_lc1885f_build_ped <?>
fb_lc1885f_readout_pl <?>
fb_lc1885f_readout <?>
fb_lc_create_pat <?>
fb_lc_create_list <?>
fb_lc_create_patlist <?>
fb_lc_mod_pat <?>
fastbus/sfi
SFIout <?>
SFIin <?>
SFIled <?>
SFIreset <?>
SFIseqrest <?>
SFIstatus <?>
SFIW <?>
SFIR <?>
SFIloadFRDB <?>
SFIloadFRDBp <?>
SFIexec <?>
SFIexecp <?>
SFI_FRDBload <?>
SFI_FRDBinit <?>
SFI_FRDBread <?>
SFI_FRDBreadinit <?>
FRDB_alter <?>
fastbus/test_sfi
FRCL <?>
FBLOOP <?>
FBBLOOP <?>
SFItFRDBload <?>
SFItexec <?>
hlral
HLRALconfig {<board> [<test registers?>]}
configures the RAL system attached to the HotLink interface <board> and counts the RAL chips either by using the DAC or the test registers (<test registers?>!=0), the results of the performed actions are written to the output buffer.
HLRALdatapathtest {<board> <column> <test registers?>}
tests the RAL system attached to the HotLink interface <board> either by using the DAC or the test registers (<test registers?>==1), in case of an error the result is written to the output buffer.
HLRALloadtestregs {<board> <column> <which data> {<list of data>}}
loads the test registers of the RAL chips in column <column> attached to the HotLink interface <board> with
'0' except the channels given in {<list of data>} (<which data>==0),
'1' except the channels given in {<list of data>} (<which data>==1),
data given as XDR string (<which data>==2), or
data given as word/chip (<which data>==3).
HLRALloaddac {<board> <column> <which data> <data>}
loads the DAC registers of the RAL chips in column <column> attached to the HotLink interface <board> with the data in <data>, data can be given as XDR data (<which data>=1) or as numbers (<which data>=0).
HLRALloaddac2 {<board> <column> <row> <channel> <value> <value> ...}
loads the DAC registers of the RAL chips in column <column>, row <row> ('-1' means 'all rows'), and channel <channel> ('-1' means 'all channels') attached to the HotLink interface <board> with the supplied data, if the number of values is '1', then all channels are set to this value, otherwise one value per channel is expected.
HLRALbuffermode {<board> <buffered?>}
sets the HotLink interface <board> to buffermode 'unbuffered' or 'buffered' (<buffered?>!=0).
HLRALtestreadout <board>
tests readout from the HotLink interface <board> and writes the data to the output buffer, data are taken from the test registers.
HLRALstartreadout {<board> <total mode?>}
starts readout from the HotLink interface <board> in normal or total mode (<total mode?>!=0), remembers the mode setting.
HLRALreadout <board>
copies the actual event from the HotLink interface <board> to the output buffer.
pci/trigger
InitPCITrigger {<path> <master?>}
initializes the ZEL PCI synchronisation and trigger module addressible as <path> and configures it as master (<master?>!=0) or slave.
ClearPCITrigger <path>
resets the trigger module.
StatusPCITrigger <id> <use pci_trigdata?> <verbose?>
write the status of the synchronisation module accessible under the identification number <id> (see SyncOpen) either from the module or from the internal structur 'pci_trigdata' (<use pci_trigdata?>!=0).
GetPCITrigData
copies the trigger statistics, i.e. the contents of the internal structure 'pci_oldtrigdata' to the output buffer.
GetPCITrigTime
writes the actual time (seconds and microseconds), the deadtime, and the number of rejected triggers to the output buffer.
WidthPCITrigger {<path> <selection> <value> <save it?>}
sets the width of the signals selected with <selection>:
0x01 = trigger 1', 0x02 = 'trigger 2', 0x04 = 'trigger 3', 0x08 = 'trigger 4', 0x10 = 'main trigger', 0x20 = 'trigger acceptance time'
to <value>, i.e. the position (between 0 and 31) of a digital potentiometer adjusting the width somewhere between 15 and 137 ns (non linear), if <save it?>!=0 this position is written into the permanent memory.
SyncBit {<path> <register id> <bit id>}
sets bit <bit id> in register <register id>.
SyncOpen <path>
opens the ZEL PCI synchronisation and trigger module addressible as <path> and writes the returned identification number to the output buffer.
SyncClose <id>
closes the synchronisation module accessible under the identification number <id>.
SyncRead {<id> <register id>}
writes the content of the register <register id> in the synchronisation module with identification number <id> to the output buffer.
SyncWrite {<id> <register id> <value>}
writes <value> to the register <register id> in the synchronisation module with identification number <id>.
SyncAuxOut {<id> <bits set to 1> <bits set to 0>}
sets the 3 auxiliary ECL outputs of the synchronisation module with identification number <id>.
SyncAuxIn <id>
writes the status of the 3 auxiliary ECL inputs to the output buffer.
pci/trigger/statist
GetSyncStatist {<mask for request> <mask for clear> <maximum channels> <scale factor>}
clears (<mask for request>==0) or writes statistics of 'last dead time' (<mask>==1), 'total dead time' (<mask>==2), and/or 'last trigger gap' (<mask>==4) to the output buffer, either some standard values (<maximum channels>==-1) or plus a histogram with all (<maximum channels>==0) or <maximum channels> channels, scaled with <scale factor> ('0'==1.0).
SetSyncStatist {<mask> <maximum channels> <scale factor>}
sets the number of channels and the scaling for the statistics histogram of the requested item(s): 'last dead time' (<mask>==1), 'total dead time' (<mask>==2), and/or 'last trigger gap' (<mask>==4).
ClearSyncStatist <mask>
clears the statistics information of the requested item(s): 'last dead time' (<mask>==1), 'total dead time' (<mask>==2), and/or 'last trigger gap' (<mask>==4).